Publication | Closed Access
A high-performance 0.08 μm CMOS
21
Citations
2
References
2002
Year
Unknown Venue
Low-power ElectronicsElectrical EngineeringμM CmosEngineeringVlsi DesignVertical Dopant Engineering/Spl Mu/m CmosBias Temperature InstabilityPower Semiconductor DeviceComputer Engineering/Spl Mu/mPower ElectronicsMicroelectronicsBeyond Cmos
We demonstrate a 0.08 /spl mu/m CMOS suitable for high-performance (V/sub dd/=1.8 V) and low-power applications (V/sub dd/<1.5 V) with the best current drive at a given off-current reported in the literature to date. Excellent short-channel effects were obtained for L/sub eff/ down to 0.06 /spl mu/m in the NFET and 0.08 /spl mu/m in the PFET. Aggressive lateral and vertical dopant engineering allow the VT to be reduced with no degradation in short-channel effects resulting in a 50% improvement in delay at V/sub dd/=1 V over the regular-V/sub T/ process.
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