Challenges of flip chip packaging with embedded fine line and multi-layer coreless substrate

Abstract

As mobile electronics are continuously driven for compact, slim and lightweight, miniaturization of IC packaging has been a must. Coreless substrate with fine-trace embedded technology is a key to achieve package miniaturization. Compare to conventional substrate, coreless substrate technology eliminates the substrate core, and utilize build-up layers to interconnect the chip and the PCB board. It brings about not only low z-height, lightweight, but also short interconnection and good power integrity. Coreless technology is a promising solution for the next generation substrate.