A method for generating random circuits and its application to routability measurement

Placement and average interconnection lengths of computer logic

W. E. Donath · IEEE Transactions on Circuits and Systems · 1979 · 437 citations

Engineering, Computer Engineering, Computer Science +16

Ratio cut partitioning for hierarchical designs

Y.-C. Wei, Chung‐Kuan Cheng · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1991 · 241 citations

Engineering, Computer Engineering, Computer Science +16

Architecture of field-programmable gate arrays: the effect of logic block functionality on area efficiency

Jonathan Rose, Robert J. Francis, David Lewis et al. · IEEE Journal of Solid-State Circuits · 1990 · 239 citations

Engineering, Computer Engineering, Computer Science +17

Two-dimensional stochastic model for interconnections in master slice integrated circuits

Abbas El Gamal · IEEE Transactions on Circuits and Systems · 1981 · 160 citations

Engineering, Computer Engineering, Electrical Engineering +16

Connectivity of Random Logic

Feuer · IEEE Transactions on Computers · 1982 · 137 citations

Engineering, Computer Engineering, Computer Science +9