Symposium on VLSI Technology · 2013 · 21 citations · 0 references
EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsMicroelectronicsSemiconductor DevicesDevice ReliabilityMemory DevicesMemristive MaterialsSemiconductor ReliabilityDynamic Random-access Memory DesignEndurance CharacteristicsEndurance OptimizationJoule HeatingMemristive MemoryNon-volatile Memory DesignThermal DamageThermal Stress Damage
We propose and demonstrate a dynamic self-adaptive write method (DSWM) for the first time, which fixes the reliability problem that over-set or over-reset degrades ReRAM endurance and retention of tail bits significantly. The demonstration is carried out on a 128Kb test macro of AlOx/WOx bi-layer ReRAM fabricated based on 0.18μm standard logic Al interconnect. Results show that the mean value of endurance distribution is improved by 2 orders of magnitude from 105 to 107 and the optimized retention of 128Kb array including tail bits is 85°C @10yrs. The improvements are attributed to the decrease of Joule thermal damage by DSWM.