State Retention Techniques

State Retention Techniques is a power management methodology in low-power integrated circuit design that selectively preserves the operational state of idle circuit components through localized retention registers or memory elements, thereby enabling rapid resumption of activity while minimizing leakage energy during standby modes.

Publications

986

Citations

118

Authors

Institutions

Publications per year

2017–2026

Parents

Leakage Power Reduction

Publications

SoC Logic Compatible Multi-Bit FeMFET Weight Cell for Neuromorphic Applications

Kai Ni, J. A. Smith, Benjamin Grisafe et al. · 2018 · 125 citations

Engineering, Computer Engineering, Electrical Engineering +16

MTCMOS sequential circuits

J. Kao, Anantha P. Chandrakasan · European Solid-State Circuits Conference · 2001 · 98 citations

Engineering, Computer Engineering, Electrical Engineering +17

An FRAM-Based Nonvolatile Logic MCU SoC Exhibiting 100% Digital State Retention at <formula formulatype="inline"> <tex Notation="TeX">${\rm VDD}=$</tex></formula> 0 V Achieving Zero Leakage With <formula formulatype="inline"><tex Notation="TeX">${&lt;}$</tex> </formula>400-ns Wakeup Time for ULP Applications

Sudhanshu Khanna, Steven Bartling, M.A. Clinton et al. · IEEE Journal of Solid-State Circuits · 2013 · 65 citations

Engineering, Computer Engineering, Computer Science +17

Power saving through state retention in IGZO‐TFT AMOLED displays for wearable applications

Soeren Steudel, Jan‐Laurens P. J. van der Steen, Manoj Nag et al. · Journal of the Society for Information Display · 2017 · 60 citations · Full text

Engineering, Electrical Engineering, Materials Engineering +17

A unifying methodology for intellectual property and custom logic testing

S. Bhatia, T. Gheewala, P. Varma · 2002 · 51 citations

Engineering, Computer Engineering, Computer Science +14

1–5 of 31

Authors

118

GV
Geoff V. Merrett
University of Southampton, United Kingdom
3 publications · 45 citations
3
h-index
DF
David Flynn
Heriot-Watt University, United Kingdom
3 publications · 33 citations
3
h-index
RP
Rubin Parekhji
Texas Instruments (India), India
2 publications · 44 citations
2
h-index
DB
Domenico Balsamo
University of Southampton, United Kingdom
2 publications · 33 citations
2
h-index
KC
Krishnendu Chakrabarty
Duke University, United States
2 publications · 44 citations
2
h-index

1–5 of 118

Institutions

1–8 of 33

Venues

IEEE Journal of Solid-State Circuits
2 publications · 85 citations
2
h-index
IEEE Transactions on Circuits and Systems I Regular Papers
1 publications · 12 citations
1
h-index
IET Computers & Digital Techniques
1 publications · 10 citations
1
h-index
IEEE Transactions on Parallel and Distributed Systems
TPDS · 1 publications · 30 citations
1
h-index
ACM Transactions on Software Engineering and Methodology
TOSEM · 1 publications · 25 citations
1
h-index

1–5