Sleep Transistor Design

Sleep Transistor Design is a power gating technique in low-power integrated circuit design where a transistor is inserted in series with the power supply of a circuit block to minimize leakage current during standby modes by creating a high-impedance state, thereby distinguishing it from other leakage reduction methods through its explicit use of switch-based power disconnection.

102

Publications

4.7K

Citations

241

Authors

78

Institutions

Publications per year

2017–2026

8

Authors

241

  1. EM
    Enrico Macii

    Politecnico di Torino, Italy

    10 publications · 216 citations

    10

    h-index

  2. LB
    Luca Benini

    University of Bologna, Italy

    9 publications · 186 citations

    9

    h-index

  3. AP
    Anantha P. Chandrakasan

    Massachusetts Institute of Technology, United States

    8 publications · 1.2K citations

    8

    h-index

  4. MP
    Massimo Poncino

    Politecnico di Torino, Italy

    7 publications · 149 citations

    7

    h-index

  5. AM
    Alberto Macii

    Politecnico di Torino, Italy

    7 publications · 161 citations

    7

    h-index

1–5 of 241

Venues

  1. 8

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  2. IEEE Journal of Solid-State Circuits

    6 publications · 1.1K citations

    6

    h-index

  3. 2

    h-index

  4. 2

    h-index

  5. 2

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1–5