Concepedia

Prefix Adder Design

Prefix Adder Design is a computational architecture methodology within parallel prefix computation that optimizes binary addition by hierarchically structuring carry propagation through prefix operators to minimize critical path delay.

145

Publications

5.6K

Citations

299

Authors

126

Institutions

Publications per year

2017–2026

40

Parents

Publications

145

1–5 of 145

Authors

299

  1. HV
    H.T. Vergos

    University of Patras, Greece

    9 publications · 581 citations

    9

    h-index

  2. DN
    D. Nikolos

    University of Patras, Greece

    9 publications · 663 citations

    8

    h-index

  3. CE
    C. Efstathiou

    National and Kapodistrian University of Athens, Greece

    8 publications · 521 citations

    8

    h-index

  4. SR
    Subhendu Roy

    The University of Texas at Austin, United States

    6 publications · 185 citations

    6

    h-index

  5. RP
    Ruchir Puri

    IBM Research - Thomas J. Watson Research Center, United States

    4 publications · 103 citations

    4

    h-index

1–5 of 299

Institutions

126

  1. University of Patras

    Pátrai, Greece

    10 h-index

    22 publications

    1.4K citations

  2. Technological Educational Institute of Athens

    Athens, Greece

    8 h-index

    8 publications

    521 citations

  3. Computer Technology Institute and Press “DIOPHANTUS”

    Pátrai, Greece

    7 h-index

    15 publications

    772 citations

  4. The University of Texas at Austin

    Austin, United States

    5 h-index

    8 publications

    234 citations

  5. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    5 h-index

    11 publications

    264 citations

  6. Chinese University of Hong Kong

    Hong Kong, Hong Kong

    4 h-index

    10 publications

    343 citations

  7. Cadence Design Systems (United States)

    San Jose, United States

    4 h-index

    5 publications

    137 citations

  8. Jaypee University of Information Technology

    Solan, India

    4 h-index

    12 publications

    291 citations

1–8 of 126

Venues

  1. IEEE Transactions on Computers

    10 publications · 772 citations

    10

    h-index

  2. 7

    h-index

  3. 4

    h-index

  4. Journal of Parallel and Distributed Computing

    4 publications · 126 citations

    4

    h-index

  5. 3

    h-index

1–5