Parallel Prefix Networks
Parallel Prefix Networks is a computational architecture that belongs to the class of parallel algorithms designed for efficient prefix computation, distinguished by its use of a fixed interconnection topology enabling logarithmic-time execution through concurrent propagation of partial results across processing elements.
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4.9K
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2017–2026
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Richard E. Ladner, Michael J. Fischer · Journal of the ACM · 1980 · 1.3K citations · Full text
Fast area-efficient VLSI adders
Tack‐Don Han, David A. Carlson · 1987 · 315 citations
Clyde P. Kruskal, Larry Rudolph, Marc Snir · IEEE Transactions on Computers · 1985 · 230 citations
A taxonomy of parallel prefix networks
David Harris · 2004 · 177 citations
Parallel construction of a suffix tree with applications
Alberto Apostolico, Costa S. Iliopoulos, Gad M. Landau et al. · Algorithmica · 1988 · 170 citations
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University of Patras
Pátrai, Greece
7 h-index
17 publications
735 citations
Technological Educational Institute of Athens
Athens, Greece
6 h-index
6 publications
314 citations
Computer Technology Institute and Press “DIOPHANTUS”
Pátrai, Greece
5 h-index
11 publications
358 citations
National Taiwan University of Science and Technology
Taipei, Taiwan
4 h-index
8 publications
158 citations
The University of Texas at Austin
Austin, United States
4 h-index
7 publications
162 citations
University of California, Santa Barbara
Santa Barbara, United States
4 h-index
6 publications
189 citations
Carnegie Mellon University
Pittsburgh, United States
3 h-index
3 publications
309 citations
University of California, Berkeley
Berkeley, United States
3 h-index
3 publications
164 citations
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6 publications · 170 citations
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TPDS · 4 publications · 156 citations
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