Concepedia

Multi-core Power Management

Multi-Core Power Management is a power-aware design framework that dynamically regulates power consumption across multiple processing cores by exploiting workload distribution, core activity states, and inter-core dependencies to optimize energy efficiency in multi-core systems.

224

Publications

10K

Citations

632

Authors

204

Institutions

Publications per year

2017–2026

40

Parents

Publications

224

An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget

Canturk Isci, Alper Buyuktosunoglu, Pradip Bose et al. · Proceedings of the ... annual International Symposium on Microarchitecture/Proceedings of the annual International Symposium on Microarchitecture · 2006 · 623 citations

, , +17

A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling

Jason Howard, Saurabh Dighe, Sriram Vangal et al. · IEEE Journal of Solid-State Circuits · 2010 · 390 citations

, , +17

Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors

Radu Teodorescu, Josep Torrellas · ACM SIGARCH Computer Architecture News · 2008 · 290 citations

, , +17

Where is the data? Why you cannot debate CPU vs. GPU performance without the answer

Chris Gregg, Kim Hazelwood · 2011 · 284 citations

, , +17

Pack & Cap

Ryan Cochran, Can Hankendi, Ayse K. Coskun et al. · 2011 · 234 citations

, , +16

1–5 of 224

Authors

632

  1. JH
    Jörg Henkel

    Karlsruhe Institute of Technology, Germany

    12 publications · 494 citations

    11

    h-index

  2. MS
    Muhammad Shafique

    Karlsruhe Institute of Technology, Germany

    8 publications · 385 citations

    8

    h-index

  3. AP
    Anuj Pathania

    National University of Singapore, Singapore

    7 publications · 193 citations

    7

    h-index

  4. AB
    Alper Buyuktosunoglu

    IBM (United States), United States

    7 publications · 911 citations

    7

    h-index

  5. PB
    Pradip Bose

    IBM Research - Thomas J. Watson Research Center, United States

    6 publications · 863 citations

    6

    h-index

1–5 of 632

Institutions

204

  1. Karlsruhe Institute of Technology

    Karlsruhe, Germany

    11 h-index

    38 publications

    1.4K citations

  2. Intel (United States)

    Santa Clara, United States

    10 h-index

    26 publications

    4.5K citations

  3. Carnegie Mellon University

    Pittsburgh, United States

    8 h-index

    15 publications

    787 citations

  4. IBM (United States)

    Armonk, United States

    7 h-index

    24 publications

    3.5K citations

  5. University of Wisconsin–Madison

    Madison, United States

    6 h-index

    15 publications

    421 citations

  6. National University of Singapore

    Singapore, Singapore

    6 h-index

    15 publications

    1.1K citations

  7. Hewlett-Packard (United States)

    Palo Alto, United States

    6 h-index

    16 publications

    1.5K citations

  8. Stanford University

    Stanford, United States

    6 h-index

    14 publications

    790 citations

1–8 of 204

Venues

  1. 6

    h-index

  2. ACM SIGARCH Computer Architecture News

    6 publications · 547 citations

    6

    h-index

  3. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 6 publications · 314 citations

    6

    h-index

  4. IEEE Computer Architecture Letters

    3 publications · 288 citations

    3

    h-index

  5. Sustainable Computing Informatics and Systems

    3 publications · 120 citations

    3

    h-index

1–5