Josep Torrellas - Concepedia

Author

Josep Torrellas

University of Illinois Urbana-Champaign ORCID

Also Known As

Guangyu Sun, J Torrellas, J. Torrellas, Josep Torrellas, Joseph Torrellas, Jun Nakano, Kuskin, Jeffrey, Torrellas, Josep

649

Publications

13.8K

Citations

H-Index

180

Concepts

All Affiliations

University of Illinois Urbana-Champaign Universitat Politècnica de Catalunya National Center for Supercomputing Applications Intel (United States)

About

Josep Torrellas is an author at University of Illinois Urbana-Champaign specializing in computer architecture, computer engineering, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	61	195	11.8K
2	Management	5	5	189
3	Business	2	2	41
4	Language Studies	1	1	18
5	Natural Sciences	1	1	32

Josep Torrellas

230

Publications

12.9K

Citations

H-Index

Page 1

	Year	Citations
VARIUS: A Model of Process Variation and Resulting Timing Errors for Microarchitects Smruti R. Sarangi, Brian Greskamp, Radu Teodorescu, IEEE Transactions on Semiconductor Manufacturing Hardware ModelingEngineeringProcess VariationComputer ArchitectureSoftware Engineering	2008	419
A chip-multiprocessor architecture with speculative multithreading Venkata Krishnan, Josep Torrellas IEEE Transactions on Computers EngineeringComputer ArchitectureMultithreading (Computer Architecture)Processor ArchitectureSoftware Analysis	1999	327
Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors Radu Teodorescu, Josep Torrellas ACM SIGARCH Computer Architecture News EngineeringEnergy EfficiencyPower Optimization (Eda)Computer ArchitectureHardware Security	2008	290
Bulk Disambiguation of Speculative Threads in Multiprocessors Luís Ceze, James Tuck, Josep Torrellas, ACM SIGARCH Computer Architecture News Cluster ComputingEngineeringComputer ArchitectureMultithreading (Computer Architecture)Software Analysis	2006	262
BulkSC Luís Ceze, James Tuck, Pablo Montesinos, Data ConsistencyEngineeringConcurrent ProgrammingComputer EngineeringFormal Methods	2007	260
Facelift: Hiding and slowing down aging in multicores Abhishek Tiwari, Josep Torrellas Power-aware ComputingManycore ProcessorEngineeringNormal Workload ActivityAging-driven Application Scheduling	2008	255
InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy Mengjia Yan, Jiho Choi, Dimitrios Skarlatos, EngineeringInformation SecurityComputer ArchitectureConfidential ComputingSide-channel Attack	2018	248
ReVive Milos Prvulović, Zheng Zhang, Josep Torrellas ACM SIGARCH Computer Architecture News Hardware SecurityCluster ComputingHigh Availability SoftwareEngineeringShared Memory	2002	238
FlexRAM: Toward an advanced Intelligent Memory system Kang Yi, Wei Huang, Seung-Moon Yoo, Hardware SecurityPim ChipsEngineeringPim ChipComputer Design	2012	234
POSH Wei Liu, James Tuck, Luís Ceze, EngineeringCompiler TechnologyComputer ArchitectureSoftware AnalysisHardware Security	2006	216

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