I/o Buffer Design
I/O Buffer Design is a hardware architecture methodology that specifies the structure, organization, and management of temporary storage elements used to reconcile speed, timing, and data format mismatches between input/output devices and a computer system’s central processing unit or memory subsystem.
47
Publications
1.4K
Citations
128
Authors
45
Institutions
Publications per year
2017–2026
1
Parents
47
Vivek S. Pai, Peter Druschel, Willy Zwaenepoel · ACM Transactions on Computer Systems · 2000 · 187 citations · Full text
IO-lite: a unified I/O buffering and caching system
Vivek S. Pai, Peter Druschel, Willy Zwaenepoel · 1999 · 107 citations · Full text
AD-LRU: An efficient buffer replacement algorithm for flash-based databases
Peiquan Jin, Yi Ou, Theo Härder et al. · Data & Knowledge Engineering · 2011 · 89 citations
1–5 of 47
128
6
h-index
2
h-index
2
h-index
2
h-index
2
h-index
1–5 of 128
45

National Yang Ming Chiao Tung University
Hsinchu, Taiwan
8 h-index
15 publications
386 citations
North Carolina State University
Raleigh, United States
3 h-index
6 publications
215 citations

Altice Portugal (Portugal)
Lisbon, Portugal
2 h-index
7 publications
113 citations
Northwestern University
Evanston, United States
2 h-index
4 publications
120 citations
Jeonbuk National University
Jeonju, South Korea
2 h-index
5 publications
103 citations

Rice University
Houston, United States
2 h-index
6 publications
882 citations
NEC (Japan)
Tokyo, Japan
1 h-index
6 publications
66 citations
National Central University
Taoyuan City, Taiwan
1 h-index
3 publications
36 citations
1–8 of 45
4 publications · 156 citations
4
h-index
3 publications · 67 citations
3
h-index
2 publications · 38 citations
2
h-index
IV · 1 publications · 23 citations
1
h-index
Conference · 1 publications · 13 citations
1
h-index
1–5