I/o Architecture
I/O Architecture is a specialized subsystem within field-programmable gate array (FPGA) design that defines the structural and functional organization of input/output interfaces, distinguishing itself by governing signal connectivity, electrical characteristics, and protocol compatibility between the FPGA fabric and external systems.
606
Publications
21.1K
Citations
2.3K
Authors
440
Institutions
Publications per year
2017–2026
87
606
The design and implementation of a first-generation CELL processor
D. Pham, S. Asano, M. Bolliger et al. · 2005 · 547 citations
Engineering, Computer Engineering, Electrical Engineering +17
The Garp architecture and C compiler
Timothy J. Callahan, John R. Hauser, John Wawrzynek · Computer · 2000 · 391 citations
NVIDIA A100 Tensor Core GPU: Performance and Innovation
Jack Choquette, Wishwesh Gandhi, Olivier Giroux et al. · IEEE Micro · 2021 · 380 citations
1–5 of 606
2.3K
15
h-index
12
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10
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10
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8
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1–5 of 2.3K
440
Argonne National Laboratory
Lemont, United States
23 h-index
64 publications
4.3K citations
University of Illinois Urbana-Champaign
Urbana, United States
15 h-index
35 publications
2.5K citations
Intel (United States)
Santa Clara, United States
15 h-index
110 publications
4.2K citations
Samsung (South Korea)
Seoul, South Korea
14 h-index
280 publications
8.3K citations
IBM (United States)
Armonk, United States
14 h-index
148 publications
3.3K citations
University of California, Berkeley
Berkeley, United States
14 h-index
29 publications
2.8K citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
13 h-index
70 publications
3.1K citations

Lawrence Berkeley National Laboratory
Berkeley, United States
12 h-index
33 publications
1.4K citations
1–8 of 440
27 publications · 1.2K citations
18
h-index
11 publications · 471 citations
10
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6 publications · 199 citations
7
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7 publications · 242 citations
7
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7 publications · 342 citations
7
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1–5