Drain Engineering
Drain Engineering is a semiconductor device optimization methodology within complementary metal-oxide-semiconductor (CMOS) technology that specifically tailors the drain region’s doping profile, geometry, and material properties to mitigate short-channel effects, reduce leakage current, and enhance transistor reliability in advanced integrated circuit fabrication.
83
Publications
2K
Citations
265
Authors
99
Institutions
Publications per year
2017–2026
6
83
Environmental Systems Optimization.
Christina Sinclair, Douglas A. Haith · Biometrics · 1982 · 91 citations
1–5 of 83
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99
Motorola (United States)
Schaumburg, United States
3 h-index
14 publications
409 citations
Hitachi (Japan)
Tokyo, Japan
3 h-index
8 publications
330 citations
Purdue University West Lafayette
West Lafayette, United States
3 h-index
12 publications
355 citations
University of California, Los Angeles
Los Angeles, United States
2 h-index
4 publications
66 citations
Iowa State University
Ames, United States
2 h-index
3 publications
110 citations
Malaviya National Institute of Technology Jaipur
Jaipur, India
2 h-index
2 publications
31 citations
National Institute Of Technology Silchar
Silchar, India
2 h-index
4 publications
62 citations

Colorado School of Mines
Golden, United States
2 h-index
3 publications
38 citations
1–8 of 99
11 publications · 268 citations
11
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4 publications · 68 citations
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3 publications · 112 citations
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2 publications · 79 citations
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2 publications · 24 citations
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1–5