Drain Engineering

Drain Engineering is a semiconductor device optimization methodology within complementary metal-oxide-semiconductor (CMOS) technology that specifically tailors the drain region’s doping profile, geometry, and material properties to mitigate short-channel effects, reduce leakage current, and enhance transistor reliability in advanced integrated circuit fabrication.

83

Publications

2K

Citations

265

Authors

99

Institutions

Publications per year

2017–2026

6

Authors

265

  1. LC
    L. C. Bowling

    Purdue University West Lafayette, United States

    3 publications · 101 citations

    3

    h-index

  2. EJ
    E. J. Kladivko

    Purdue University West Lafayette, United States

    3 publications · 44 citations

    3

    h-index

  3. ET
    Eiji Takeda

    Tokushima University, Japan

    3 publications · 128 citations

    3

    h-index

  4. RS
    Rajesh Saha

    National Institute Of Technology Silchar, India

    2 publications · 31 citations

    2

    h-index

  5. AC
    A.P. Casimiro

    Instituto de Telecomunicações, Portugal

    2 publications · 30 citations

    2

    h-index

1–5 of 265

Venues

  1. IEEE Transactions on Electron Devices

    11 publications · 268 citations

    11

    h-index

  2. Transactions of the ASAE

    4 publications · 68 citations

    4

    h-index

  3. IEEE Electron Device Letters

    3 publications · 112 citations

    3

    h-index

  4. Agricultural Water Management

    2 publications · 79 citations

    2

    h-index

  5. 2

    h-index

1–5