Clock Domain Partitioning

Clock Domain Partitioning is a hardware design methodology that involves the strategic division of a synchronous digital system into distinct clock domains to manage timing constraints and facilitate safe data transfer across asynchronous boundaries.

Publications

948

Citations

Authors

Institutions

Publications per year

2017–2026

Parents

Clock Management

Publications

Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling

G. Semeraro, Grigorios Magklis, Rajeev Balasubramonian et al. · 2004 · 370 citations

Engineering, Computer Engineering, Computer Science +17

Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor

Grigorios Magklis, Michael L. Scott, G. Semeraro et al. · 2003 · 150 citations · Full text

Engineering, Computer Engineering, Computer Science +17

Optimal buffered routing path constructions for single and multiple clock domain systems

Soha Hassoun, Charles J. Alpert, Meera Thiagarajan · Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design · 2002 · 46 citations

Engineering, Computer Engineering, Computer Science +17

GALS at ETH Zurich: Success or Failure

Frank K. Gürkaynak, S. Oetiker, Hubert Kaeslin et al. · 2006 · 45 citations

Engineering, Computer Engineering, Computer Science +17

Power Management of Voltage/Frequency Island-Based Systems Using Hardware-Based Methods

Puru Choudhary, Diana Marculescu · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2009 · 42 citations

Engineering, Computer Engineering, Electrical Engineering +17

1–5 of 20

Authors

DH
David H. Albonesi
University of Rochester, United States
5 publications · 603 citations
5
h-index
GM
Grigorios Magklis
University of Rochester, United States
4 publications · 585 citations
4
h-index
ML
Michael L. Scott
University of Rochester, United States
4 publications · 585 citations
4
h-index
GS
G. Semeraro
University of Rochester, United States
4 publications · 585 citations
4
h-index
SD
Steven Dropsho
École Polytechnique Fédérale de Lausanne, Switzerland
3 publications · 215 citations
3
h-index

1–5 of 60

Institutions

1–8 of 26

Venues

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
1 publications · 42 citations
1
h-index
2022 25th Euromicro Conference on Digital System Design (DSD)
Conference · 1 publications · 40 citations
1
h-index
Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design
ICCAD · 1 publications · 46 citations
1
h-index
IET Computers & Digital Techniques
1 publications · 14 citations
1
h-index
ACM SIGARCH Computer Architecture News
1 publications · 33 citations
1
h-index

1–5