Clock Buffer Insertion

Clock Buffer Insertion is a design methodology in clock distribution networks that involves the strategic placement of buffer elements to restore signal integrity and manage clock skew by compensating for capacitive loading and propagation delays along the clock path.

Publications

1.8K

Citations

121

Authors

Institutions

Publications per year

2017–2026

Parents

Clock Distribution Networks

Publications

Skew And Delay Optimization For Reliable Buffered Clock Trees

S. Pullela, N. Menezes, J. Omar et al. · Proceedings of 1993 International Conference on Computer Aided Design (ICCAD) · 2005 · 109 citations

Engineering, Computer Engineering, Computer Science +17

Clock distribution on a dual-core, multi-threaded Itanium-family processor

Patrick Mahoney, E. Fetzer, Barry M. Doyle et al. · 2005 · 105 citations

Engineering, Computer Engineering, Electrical Engineering +17

Minimal buffer insertion in clock trees with skew and slew rate constraints

Gustavo Tèllez, Majid Sarrafzadeh · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1997 · 88 citations

Engineering, Computer Engineering, Computer Science +17

An integrated environment for technology closure of deep-submicron IC designs

Louise Trevillyan, David S. Kung, Ruchir Puri et al. · IEEE Design & Test of Computers · 2004 · 84 citations

Engineering, Computer Engineering, Computer Science +17

Statistical timing analysis driven post-silicon-tunable clock-tree synthesis

Jeng-Liang Tsai, Lizheng Zhang, Charlie Chung‐Ping Chen · International Conference on Computer Aided Design · 2005 · 82 citations

Engineering, Computer Engineering, Computer Science +16

1–5 of 50

Authors

121

MD
Martin D. F. Wong
University of Illinois Urbana-Champaign, United States
3 publications · 162 citations
3
h-index
PS
P. Sithambaram
Politecnico di Torino, Italy
3 publications · 103 citations
3
h-index
MP
Massimo Poncino
Politecnico di Torino, Italy
3 publications · 103 citations
3
h-index
KD
K. Duraisami
Politecnico di Torino, Italy
3 publications · 103 citations
3
h-index
LB
Luca Benini
University of Bologna, Italy
3 publications · 103 citations
3
h-index

1–5 of 121

Institutions

1–8 of 46

Venues

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
5 publications · 208 citations
5
h-index
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
3 publications · 105 citations
3
h-index
IEEE Journal of Solid-State Circuits
2 publications · 93 citations
2
h-index
Proceedings - ACM IEEE Design Automation Conference
2 publications · 28 citations
2
h-index
International Conference on Computer Aided Design
Conference · 2 publications · 116 citations
2
h-index

1–5