N. Menezes - Concepedia

Author

N. Menezes

The University of Texas at Austin

Also Known As

N. Menezes, Nicássio S. Menezes

Publications

650

Citations

H-Index

Concepts

All Affiliations

The University of Texas at Austin Intel (United States)Carnegie Mellon University

About

N. Menezes is an author at The University of Texas at Austin specializing in computer architecture, vlsi design, and computer engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	11	12	635
2	Computer Engineering	11	12	635
3	Electrical Engineering	10	10	488
4	Computer Science	6	6	359
5	Operations Research	1	1	14

N. Menezes

Publications

650

Citations

H-Index

Page 1

	Year	Citations
Performance computation for precharacterized CMOS gates with RC loads Florentin Dartu, N. Menezes, Lawrence T. Pileggi IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Nonlinear Iteration ProcedureElectrical EngineeringEngineeringVlsi DesignCircuit Design	1996	159
Repeater Scaling and Its Impact on CAD Prashant Saxena, N. Menezes, P. Cocchini, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Abstract FabricsEngineeringVlsi DesignComputer ArchitectureComputer-aided Design	2004	152
Skew And Delay Optimization For Reliable Buffered Clock Trees S. Pullela, N. Menezes, J. Omar, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD) EngineeringVlsi DesignClock RecoveryTiming AnalysisDelay Optimization	2005	108
Predicting circuit performance using circuit-level statistical timing analysis R.B. Brawhear, N. Menezes, Chang-Hwan Oh, Overall Circuit DelayElectrical EngineeringStatistical Gate DelaysEngineeringPhysical Design (Electronics)	2002	46
Clustering and load balancing for buffered clock tree synthesis A. Mehta, Yao-Ping Chen, N. Menezes, Cluster ComputingEngineeringVlsi DesignComputer ArchitectureClock Trees	2002	39
Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets S. Pullela, N. Menezes, Lawrence T. Pileggi IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringVlsi DesignComputer ArchitectureInterconnect (Integrated Circuits)Hardware Security	1997	28
Spec-based repeater insertion and wire sizing for on-chip interconnect N. Menezes, Chung-Ping Chen Time Delay SystemElectrical EngineeringPhysical Design (Electronics)EngineeringVlsi Design	1999	22
A multi-port current source model for multiple-input switching effects in CMOS library cells Chirayu Amin, Chandramouli Kashyap, N. Menezes, Proceedings - ACM IEEE Design Automation Conference EngineeringVlsi DesignStage DelayComputer ArchitecturePower Electronics	2006	21
Low power IC clock tree design S. Pullela, N. Menezes, L.T. Pillage Low-power ElectronicsHardware SecurityElectrical EngineeringEngineeringVlsi Design	2002	18
Skew reduction in clock trees using wire width optimization N. Menezes, A. Balivada, S. Pullela, Electrical EngineeringEngineeringVlsi DesignSkew Reduction HeuristicsClock Recovery	2002	17

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