Built-in Current Testing

Built-In Current Testing is a built-in self-test methodology that detects faults in integrated circuits by monitoring supply current anomalies during testing, distinguishing itself from other techniques through its reliance on quiescent or dynamic current signatures rather than voltage-based logic responses.

32

Publications

1.3K

Citations

80

Authors

29

Institutions

Publications per year

2017–2026

0

Variants

Iddq TestingQuiescent Current Testing

Authors

80

  1. WM
    W. Maly

    Carnegie Mellon University, United States

    7 publications · 661 citations

    7

    h-index

  2. PN
    P. Nigh

    IBM (United States), United States

    5 publications · 494 citations

    5

    h-index

  3. MP
    M.J. Patyra

    Intel (United States), United States

    3 publications · 177 citations

    3

    h-index

  4. JL
    Jien-Chung Lo

    University of Rhode Island, United States

    2 publications · 81 citations

    2

    h-index

  5. TS
    Tung-Li Shen

    University of Rhode Island, United States

    2 publications · 81 citations

    2

    h-index

1–5 of 80

Venues

  1. IEEE Journal of Solid-State Circuits

    5 publications · 251 citations

    5

    h-index

  2. IEEE Design & Test of Computers

    2 publications · 153 citations

    2

    h-index

  3. Electronics Letters

    1 publications · 18 citations

    1

    h-index

  4. Journal of Electronic Testing

    JETTA · 1 publications · 65 citations

    1

    h-index

  5. 1

    h-index

1–5