Srinivas Patil - Concepedia

Author

Srinivas Patil

Intel (United States)

Also Known As

Patil S C, S C Patil, Srinivas Patil

Publications

258

Citations

H-Index

Concepts

All Affiliations

Intel (United States)Purdue University West Lafayette Duke University

About

Srinivas Patil is an author at Intel (United States) specializing in computer engineering, engineering, and software testing.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	9	9	212
2	Computer Engineering	9	9	212
3	Computer Science	7	7	162
4	Systems Engineering	4	4	97
5	Asynchronous Circuits	1	1	31

Srinivas Patil

Publications

223

Citations

H-Index

Page 1

	Year	Citations
A Functional Coverage Metric for Estimating the Gate-Level Fault Coverage of Functional Tests Sungchul Park, Li Chen, Praveen Parvathala, Proceedings/Proceedings - International Test Conference Functional Coverage MetricEngineeringMem TestingVerificationTest Coverage	2006	32
Parallel test generation for sequential circuits on general-purpose multiprocessors Srinivas Patil, Prithviraj Banerjee, J.H. Patel EngineeringComputer ArchitectureHardware SystemsFormal VerificationParallel Test Generation	1991	31
A low-cost concurrent error detection technique for processor control logic Ramtilak Vemu, Abhijit Jas, Jacob A. Abraham, EngineeringError Control TechniqueVerificationComputer ArchitectureFormal Verification	2008	27
RT-Level Deviation-Based Grading of Functional Test Sequences Hongxia Fang, Krishnendu Chakrabarty, Abhijit Jas, EngineeringMem TestingComputer ArchitectureHardware SecurityReliability Engineering	2009	27
The Region-Exhaustive Fault Model Abhijit Jas, Suriyaprakash Natarajan, Srinivas Patil EngineeringFault ModelsHardware SecurityReliability EngineeringFault Analysis	2007	23
FPGA-based hardware acceleration for Boolean satisfiability Kanupriya Gulati, Suganth Paul, Sunil P. Khatri, ACM Transactions on Design Automation of Electronic Systems EngineeringHardware Verification LanguageVerificationComputer ArchitectureFormal Verification	2009	22
Estimating the Fault Coverage of Functional Test Sequences Without Fault Simulation Irith Pomeranz, Praveen K. Parvathala, Srinivas Patil EngineeringVerificationTest CoverageTest Data GenerationSoftware Engineering	2007	20
Testing of Clock-Domain Crossing Faults in Multi-core System-on-Chip Naghmeh Karimi, Zhiqiu Kong, Krishnendu Chakrabarty, Clock-domain Crossing FaultsEngineeringMem TestingVerificationComputer Architecture	2011	16
Selecting High-Quality Delay Tests for Manufacturing Test and Debug Hangkyu Lee, Suriyaprakash Natarajan, Srinivas Patil, Proceedings EngineeringVerificationComputer ArchitectureReliability EngineeringComputational Testing	2006	14
Parallel algorithms for test generation and fault simulation Srinivas Patil	1991	11

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