C.L. Portmann - Concepedia

Author

C.L. Portmann

Rambus (United States)

Also Known As

C. L. Portmann, C. Portmann, C.L. Portmann, Clemenz Portmann

Publications

539

Citations

H-Index

Concepts

All Affiliations

Rambus (United States)Stanford University Stanford SystemX Alliance Rambus (United Kingdom)Integrated Systems Solutions (United States)

About

C.L. Portmann is an author at Rambus (United States) specializing in engineering, computer engineering, and vlsi design.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	10	10	505
2	Computer Engineering	10	10	505
3	Electrical Engineering	7	7	456
4	Systems Engineering	2	2	89
5	Computer Science	1	1	22

C.L. Portmann

Publications

505

Citations

H-Index

Page 1

	Year	Citations
A portable digital DLL for high-speed CMOS interface circuits B.W. Garlepp, Kevin Donnelly, Jun Kim, IEEE Journal of Solid-State Circuits Hardware SecurityElectrical EngineeringEngineeringVlsi DesignDual Delay Lines	1999	188
Power-efficient metastability error reduction in CMOS flash A/D converters C.L. Portmann, T.H. Meng IEEE Journal of Solid-State Circuits Low-power ElectronicsHardware SecurityElectrical EngineeringEquivalent Error RateEngineering	1996	73
Metastability in CMOS library elements in reduced supply and technology scaled applications C.L. Portmann, H.Y. Meng IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringPhysical Design (Electronics)EngineeringVlsi Design	1995	72
Optimization of phase-locked loop circuits via geometric programming D. M. COLLERAN, C.L. Portmann, Arjang Hassibi, Mathematical ProgrammingPhase-locked Loop CircuitsElectrical EngineeringPll CircuitsEngineering	2004	64
Analog-DFE-based 16Gb/s SerDes in 40nm CMOS that operates across 34dB loss channels at Nyquist with a baud rate CDR and 1.2V<inf>pp</inf> voltage-mode driver Andrew Joy, Hugh Mair, Hae-Chang Lee, Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignData Converter	2011	31
A process-independent, 800-MB/s, DRAM byte-wide interface featuring command interleaving and concurrent memory operation M. Griffin, Jared Zerbe, G. Tsang, IEEE Journal of Solid-State Circuits EngineeringVlsi DesignComputer ArchitectureDram Byte-wide InterfaceMulti-channel Memory Architecture	1998	22
Cell libraries and assembly tools for analog/digital CMOS and BiCMOS application-specific integrated circuit design M.J.S. Smith, C.L. Portmann, C. Anagnostopoulos, IEEE Journal of Solid-State Circuits Assembly ToolsEngineeringVlsi DesignAnalog DesignCell Libraries	1989	17
Supply noise and CMOS synchronization errors C.L. Portmann IEEE Journal of Solid-State Circuits Synchronization FailuresEngineeringHardware ReliabilityClock RecoverySupply Noise	1995	16
An 800 mW 10 Gb Ethernet transceiver in 0.13 μm CMOS S. Sidiropoulos, N. Acharya, P.S. Chau, Low-power ElectronicsSystem On ChipElectrical EngineeringMw 10μM Cmos	2004	11
A portable digital DLL architecture for CMOS interface circuits B.W. Garlepp, Kevin Donnelly, Jun Kim, Hardware SecurityCmos Interface CircuitsEngineeringDual Delay LinesClock Recovery	2002	11

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