Sungchun Jang

An Optimum Loop Gain Tracking All-Digital PLL Using Autocorrelation of Bang–Bang Phase-Frequency Detection

Sungchun Jang, Sungwoo Kim, Sang-Hyeok Chu et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2015 · 48 citations

Bang–bang Phase-frequency Detection, Minimum Jitter, High-frequency Device +8

A 22 to 26.5 Gb/s Optical Receiver With All-Digital Clock and Data Recovery in a 65 nm CMOS Process

Sang-Hyeok Chu, Woorham Bae, Gyu-Seob Jeong et al. · IEEE Journal of Solid-State Circuits · 2015 · 47 citations

Photonics, Engineering, Measured Jitter Tolerance +14

A 1.1-V 10-nm Class 6.4-Gb/s/Pin 16-Gb DDR5 SDRAM With a Phase Rotator-ILO DLL, High-Speed SerDes, and DFE/FFE Equalization Scheme for Rx/Tx

Dongkyun Kim, Kibong Koo, Yongmi Kim et al. · IEEE Journal of Solid-State Circuits · 2019 · 31 citations

Hardware Security, Power Consumption, Decision Feedback Equalization +14

23.2 A 1.1V 1ynm 6.4Gb/s/pin 16Gb DDR5 SDRAM with a Phase-Rotator-Based DLL, High-Speed SerDes and RX/TX Equalization Scheme

Dongkyun Kim, Minsu Park, Sungchun Jang et al. · 2019 · 29 citations

Engineering, Vlsi Design, Computer Architecture +16

A 13.8mW 3.0Gb/s clock-embedded video interface with DLL-based data-recovery circuit

Sungchun Jang, Heesoo Song, Seok-Min Ye et al. · 2011 · 17 citations

System On Chip, Electrical Engineering, Engineering +12