Min-Seong Choo

A 4–20-Gb/s 1.87-pJ/b Continuous-Rate Digital CDR Circuit With Unlimited Frequency Acquisition Capability in 65-nm CMOS

Kwanseo Park, Kwang‐Ho Lee, Sung‐Yong Cho et al. · IEEE Journal of Solid-State Circuits · 2020 · 45 citations

Continuous-rate Referenceless Clock, Prototype Cdr Circuit, Cdr Circuit +8

A 2.5–5.6 GHz Subharmonically Injection-Locked All-Digital PLL With Dual-Edge Complementary Switched Injection

Sung‐Yong Cho, Sungwoo Kim, Min-Seong Choo et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2018 · 26 citations

Electrical Engineering, High-frequency Device, Clock Recovery +5

29.7 A 2.5GHz injection-locked ADPLL with 197fs<inf>rms</inf> integrated jitter and −65dBc reference spur using time-division dual calibration

Sungwoo Kim, Han-Gon Ko, Sung‐Yong Cho et al. · 2017 · 25 citations

Time-division Dual Calibration, Clock Recovery, −65Dbc Reference +12

A 5-GHz subharmonically injection-locked all-digital PLL with complementary switched injection

Sung‐Yong Cho, Sungwoo Kim, Min-Seong Choo et al. · 2015 · 17 citations

Pulse Generator, Electrical Engineering, Engineering +9

27.7 A Synthesizable Digital AOT 4-Phase Buck Voltage Regulator for Digital Systems with 0.0054mm² Controller and 80ns Recovery Time

Minho Choi, Chan‐Ho Kye, Jonghyun Oh et al. · 2019 · 13 citations

Electrical Engineering, Engineering, Data Converter +13