Jaspal Singh Shah

A 32 kb Macro with 8T Soft Error Robust, SRAM Cell in 65-nm CMOS

Jaspal Singh Shah, David Nairn, Manoj Sachdev · IEEE Transactions on Nuclear Science · 2015 · 33 citations

Non-volatile Memory, Engineering, Vlsi Design +17

An Energy-Efficient Offset-Cancelling Sense Amplifier

Jaspal Singh Shah, David Nairn, Manoj Sachdev · IEEE Transactions on Circuits & Systems II Express Briefs · 2013 · 31 citations

Electrical Engineering, Engineering, Vlsi Design +11

Object location and centroiding techniques with CMOS active pixel sensors

Ryan D. Burns, Jaspal Singh Shah, Canaan S. Hong et al. · IEEE Transactions on Electron Devices · 2003 · 27 citations

Engineering, Localization, Integral Comparator +16

Design and Analysis of A 5.3-pJ 64-kb Gated Ground SRAM With Multiword ECC

Shah M. Jahinuzzaman, Jaspal Singh Shah, David J. Rennie et al. · IEEE Journal of Solid-State Circuits · 2009 · 22 citations

Hardware Security, Composite Word, Electrical Engineering +13

Characterization and deblurring of lateral crosstalk in CMOS image sensors

Ji Soo Lee, Jaspal Singh Shah, M.E. Jernigan et al. · IEEE Transactions on Electron Devices · 2003 · 19 citations

Deblurring, Lateral Crosstalk, Engineering +10