H. Wilson

An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS

Sriram Vangal, Jason Howard, Greg Ruhl et al. · IEEE Journal of Solid-State Circuits · 2008 · 625 citations

Engineering, Vlsi Design, Computer Architecture +16

1.1 V 1 GHz communications router with on-chip body bias in 150 nm CMOS

S. Narendra, M. Haycock, V. Govindarajulu et al. · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2003 · 68 citations

Engineering, Vlsi Design, Nm Cmos +16

A TCP offload accelerator for 10 Gb/s ethernet in 90-nm CMOS

Yatin Hoskote, B. Bloechel, G. Dermer et al. · IEEE Journal of Solid-State Circuits · 2003 · 45 citations

Engineering, Vlsi Design, Tcp Offload Accelerator +23

A six-port 30-GB/s nonblocking router component using point-to-point simultaneous bidirectional signaling for high-bandwidth interconnects

H. Wilson, M. Haycock · IEEE Journal of Solid-State Circuits · 2001 · 37 citations

Router Core, Electrical Engineering, Engineering +13

5-GHz 32-bit integer execution core in 130-nm dual-V/sub T/ CMOS

Sriram Vangal, Mark Anders, Nitin Borkar et al. · IEEE Journal of Solid-State Circuits · 2002 · 35 citations

Low-power Electronics, Hardware Security, Electrical Engineering +13