P.-E. Gaillardon

Polarity control in double-gate, gate-all-around vertically stacked silicon nanowire FETs

Michele De Marchi, Davide Sacchetto, Stefano Frache et al. · 2012 · 304 citations · Full text

Engineering, Electrical Engineering, Materials Science +14

3-D Sequential Integration: A Key Enabling Technology for Heterogeneous Co-Integration of New Function With CMOS

P. Batude, T. Ernst, Julien Arcamone et al. · IEEE Journal on Emerging and Selected Topics in Circuits and Systems · 2012 · 109 citations

Engineering, Electrical Engineering, Materials Science +17

Wave pipelining for majority-based beyond-CMOS technologies

Odysseas Zografos, A. De Meester, Eleonora Testa et al. · 2017 · 18 citations · Full text

Engineering, Computer Engineering, Computer Science +13

Reducing transistor count in clocked standard cells with ambipolar double-gate FETs

Kotb Jabeur, David Navarro, Ian O’Connor et al. · International Symposium on Nanoscale Architectures · 2010 · 11 citations

Engineering, Computer Engineering, Electrical Engineering +17

Reducing transistor count in clocked standard cells with ambipolar double-gate FETs

Kotb Jabeur, David Navarro, Ian O’Connor et al. · 2010 · 10 citations

Engineering, Computer Engineering, Electrical Engineering +17