Ting-Yen Chiang

Thermal analysis of heterogeneous 3D ICs with various integration scenarios

Ting-Yen Chiang, S.J. Souri, Chi On Chui et al. · 2002 · 118 citations

Engineering, Computer Engineering, Computer Systems +17

Analytical thermal model for multilevel VLSI interconnects incorporating via effect

Ting-Yen Chiang, Kaustav Banerjee, Krishna C. Saraswat · IEEE Electron Device Letters · 2002 · 93 citations

Engineering, Computer Engineering, Electrical Engineering +17

Effect of via separation and low-k dielectric materials on the thermal characteristics of Cu interconnects

Ting-Yen Chiang, Kaustav Banerjee, Krishna C. Saraswat · 2002 · 65 citations

Engineering, Electrical Engineering, Materials Engineering +17

Compact modeling and SPICE-based simulation for electrothermal analysis of multilevel ULSI interconnects

Ting-Yen Chiang, K. Banerjee, K.C. Saraswat · 2002 · 48 citations

Engineering, Computer Engineering, Electrical Engineering +17

Impact of Joule heating on scaling of deep sub-micron Cu/low-k interconnects

Ting-Yen Chiang, B.P. Shieh, Krishna C. Saraswat · 2003 · 29 citations

Engineering, Electrical Engineering, Materials Science +17