Chien-Yu Lu

A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing

Ming-Hsien Tu, Jihi-Yu Lin, Ming-Chien Tsai et al. · IEEE Journal of Solid-State Circuits · 2012 · 171 citations

Non-volatile Memory, Electrical Engineering, Subthreshold Sram +13

A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist

Chien-Yu Lu, Ching-Te Chuang, Shyh‐Jye Jou et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014 · 32 citations

Non-volatile Memory, Engineering, Vlsi Design +18

A case study of lean digital transformation through robotic process automation in healthcare

Wei-Lun Huang, Shu‐Lang Liao, Hsueh-Ling Huang et al. · Scientific Reports · 2024 · 30 citations · Full text

A 0.33-V, 500-kHz, 3.94-$\mu\hbox{W}$ 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist

Chien-Yu Lu, Ming-Hsien Tu, Hwai‐I Yang et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2012 · 13 citations

Non-volatile Memory, Engineering, Vlsi Design +19