Shyh‐Jye Jou

A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing

Ming-Hsien Tu, Jihi-Yu Lin, Ming-Chien Tsai et al. · IEEE Journal of Solid-State Circuits · 2012 · 171 citations

Non-volatile Memory, Electrical Engineering, Subthreshold Sram +13

Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist

Ming-Hsien Tu, Jihi-Yu Lin, Ming-Chien Tsai et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2010 · 137 citations

Low-power Electronics, Positive Feedback, Electrical Engineering +11

40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist

Yi-Wei Chiu, Yu-Hao Hu, Ming-Hsien Tu et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2014 · 136 citations

Low-power Electronics, Electrical Engineering, Engineering +14

An LDPC Decoder Chip Based on Self-Routing Network for IEEE 802.16e Applications

Chih-Hao Liu, Shau-Wei Yen, Chih-Lung Chen et al. · IEEE Journal of Solid-State Circuits · 2008 · 128 citations

Time-sensitive Networking, Engineering, Communication Engineering +10

Low-error reduced-width booth multipliers for dsp applications

Shyh‐Jye Jou, Meng‐Hung Tsai, Ya-Lan Tsao · IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications · 2003 · 68 citations

Electrical Engineering, Engineering, Vlsi Design +13