Sanguhn Cha

Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices

Sanguhn Cha, O Seongil, Hyunsung Shin et al. · 2017 · 76 citations

Engineering, Computer Engineering, Electrical Engineering +16

22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme

Chi Sung Oh, Ki Chul Chun, Young-Yong Byun et al. · 2020 · 68 citations

Engineering, Computer Engineering, Computer Science +17

Efficient Implementation of Single Error Correction and Double Error Detection Code with Check Bit Pre-computation for Memories

Sanguhn Cha, Hongil Yoon · JSTS Journal of Semiconductor Technology and Science · 2012 · 29 citations

Engineering, Computer Engineering, Computer Science +17

A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process

Ki Chul Chun, Yong-Gyu Chu, Jin‐Seok Heo et al. · 2018 · 23 citations

Engineering, Computer Engineering, Electrical Engineering +17