Ki Chul Chun

A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory

Ki Chul Chun, Hui Zhao, Jonathan Harms et al. · IEEE Journal of Solid-State Circuits · 2012 · 350 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches

Ki Chul Chun, Pulkit Jain, Taeho Kim et al. · IEEE Journal of Solid-State Circuits · 2011 · 119 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 3T Gain Cell Embedded DRAM Utilizing Preferential Boosting for High Density and Low Power On-Die Caches

Ki Chul Chun, Pulkit Jain, Jung Hwa Lee et al. · IEEE Journal of Solid-State Circuits · 2011 · 118 citations

Engineering, Computer Engineering, Electrical Engineering +17

22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme

Chi Sung Oh, Ki Chul Chun, Young-Yong Byun et al. · 2020 · 68 citations

Engineering, Computer Engineering, Computer Science +17

A 2T1C Embedded DRAM Macro With No Boosted Supplies Featuring a 7T SRAM Based Repair and a Cell Storage Monitor

Ki Chul Chun, Wei Zhang, Pulkit Jain et al. · IEEE Journal of Solid-State Circuits · 2012 · 47 citations

Engineering, Computer Engineering, Electrical Engineering +16