O Seongil - Concepedia

Author

O Seongil

Seoul National University

Also Known As

O Seongil, O. Seongil, Seongil O

Publications

1.1K

Citations

H-Index

Concepts

All Affiliations

Seoul National University Samsung (South Korea)Sungkyunkwan University University of Wisconsin–Madison Intel (United States)

About

O Seongil is an author at Seoul National University specializing in computer architecture, computer engineering, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	13	13	1K
2	Computer Engineering	13	13	1K
3	Computer Science	12	12	1K
4	Systems Engineering	2	2	334
5	Electrical Engineering	1	1	74

O Seongil

Publications

Citations

H-Index

Page 1

	Year	Citations
Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product Sukhan Lee, Shin-haeng Kang, Jaehoon Lee, EngineeringEmerging Memory TechnologyComputer ArchitecturePast Pim ArchitecturesHardware Architecture	2021	216
25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications Young-Cheon Kwon, Suk Han Lee, Jae‐Hoon Lee, Artificial IntelligenceEngineeringEmerging Memory TechnologyHardware AlgorithmComputer Architecture	2021	179
Architecting to achieve a billion requests per second throughput on a single key-value store server platform Sheng Li, Hyeontaek Lim, Victor W. Lee, Cluster ComputingEngineeringComputer ArchitectureConcurrency ControlHigh-performance Architecture	2015	118
McSimA+: A manycore simulator with application-level+ simulation and detailed microarchitecture modeling Jung Ho Ahn, Sheng Li, O Seongil, Hardware ModelingEngineeringComputer ArchitectureSimulationProcessor Architecture	2013	118
Reducing memory access latency with asymmetric DRAM bank organizations Young Hoon Son, O Seongil, Yuhwan Ro, Hardware SecurityRandom Access LatencyEngineeringLast-level CachesShared Memory	2013	113
Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices Sanguhn Cha, O Seongil, Hyunsung Shin, Hardware SecurityNon-volatile MemoryElectrical EngineeringReliability EngineeringDram Scaling Challenges	2017	74
CiDRA: A cache-inspired DRAM resilience architecture Young Hoon Son, Sukhan Lee, O Seongil, Hardware SecurityNon-volatile MemoryEngineeringAggressive Technology ScalingDram Device	2015	50
Row-buffer decoupling O Seongil, Young Hoon Son, Nam Sung Kim, ACM SIGARCH Computer Architecture News Hardware SecurityNon-volatile MemoryMemory ArchitectureEngineeringCloud Computing	2014	39
Row-buffer decoupling: A case for low-latency DRAM microarchitecture O Seongil, Young Hoon Son, Nam Sung Kim, Hardware SecurityNon-volatile MemoryMemory ArchitectureEngineeringHigh-performance Architecture	2014	38
Reducing memory access latency with asymmetric DRAM bank organizations Young Hoon Son, O Seongil, Yuhwan Ro, ACM SIGARCH Computer Architecture News EngineeringComputer ArchitectureMulti-channel Memory ArchitectureHardware SecurityRandom Access Latency	2013	23

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