L.A. Arledge

Multilevel metal capacitance models for CAD design synthesis systems

J.-H. Chern, Jia Huang, L.A. Arledge et al. · IEEE Electron Device Letters · 1992 · 236 citations

Engineering, Electronic Design, Computer-aided Design +18

SIERRA: a 3-D device simulator for reliability modeling

J.-H. Chern, Junichi Maeda, L.A. Arledge et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1989 · 39 citations

Engineering, Computer Architecture, System Reliability +22

A 1-µm bipolar VLSI technology

Stephen Evans, Sidney A. Morris, L.A. Arledge et al. · IEEE Transactions on Electron Devices · 1980 · 19 citations

Scaling and performance implications for power supply and other signal routing constraints imposed by I/O pad limitations

L.A. Arledge, W.T. Lynch · 2002 · 18 citations

Engineering, Vlsi Design, Energy Efficiency +22

An improved circuit model for CMOS latchup

James E. Hall, J.A. Seitchik, L.A. Arledge et al. · IEEE Electron Device Letters · 1985 · 12 citations

Hardware Security, Device Modeling, Electrical Engineering +11