Sunitha Bhukya

Investigation of Short Channel Effects (SCEs) and Analog/RF Figure of Merits (FOMs) of Dual-Material Bottom-Spacer Ground-Plane (DMBSGP) FinFET

Narendar Vadthiya, Pallavi Narware, V. Bheemudu et al. · Silicon · 2019 · 32 citations

Electrical Engineering, Engineering, Rf Semiconductor +6

A Proposal for Optimization of Spacer Engineering at Sub-5-nm Technology Node for JL-TreeFET: A Device to Circuit Level Implementation

Rakesh Andavarapu, Susmitha Bagati, Sresta Valasa et al. · IEEE Transactions on Electron Devices · 2023 · 27 citations

A novel bottom-spacer ground-plane (BSGP) FinFET for improved logic and analog/RF performance

Narendar Vadthiya, Pallavi Narware, V. Bheemudu et al. · AEU - International Journal of Electronics and Communications · 2020 · 24 citations

Electrical Engineering, Novel Bottom-spacer Ground-plane, Engineering +4

Optimizing U-Shape FinFETs for Sub-5nm Technology: Performance Analysis and Device-to-Circuit Evaluation in Digital and Analog/Radio Frequency Applications

K. V. Ramakrishna, Sresta Valasa, Sunitha Bhukya et al. · ECS Journal of Solid State Science and Technology · 2023 · 20 citations

Design and Performance Optimization of Junctionless Bottom Spacer FinFET for Digital/Analog/RF Applications at Sub-5nm Technology Node

Sresta Valasa, K. V. Ramakrishna, Narendar Vadthiya et al. · ECS Journal of Solid State Science and Technology · 2023 · 16 citations · Full text

Electrical Engineering, Physical Design (Electronics), Engineering +9