Sresta Valasa

An Intensive Study of Tree-Shaped JL-NSFET: Digital and Analog/RF Perspective

Sresta Valasa, Shubham Tayal, Laxman Raju Thoutam · IEEE Transactions on Electron Devices · 2022 · 40 citations

Engineering, Radio Frequency, Conventional Jl-nsfet +17

Optimization of Design Space for Vertically Stacked Junctionless Nanosheet FET for Analog/RF Applications

Sresta Valasa, Shubham Tayal, Laxman Raju Thoutam · Silicon · 2022 · 32 citations

Device Modeling, Electrical Engineering, Engineering +9

Investigation of Nanosheet-FET Based Logic Gates at Sub-7 nm Technology Node for Digital IC Applications

Shubham Tayal, Sresta Valasa, Sandip Bhattacharya et al. · Silicon · 2022 · 27 citations

Electrical Engineering, Engineering, Vlsi Design +8

A Proposal for Optimization of Spacer Engineering at Sub-5-nm Technology Node for JL-TreeFET: A Device to Circuit Level Implementation

Rakesh Andavarapu, Susmitha Bagati, Sresta Valasa et al. · IEEE Transactions on Electron Devices · 2023 · 27 citations

Design Insights into Thermal Performance of Vertically Stacked JL-NSFET with High-k Gate Dielectric for Sub 5-nm Technology Node

Sresta Valasa, Shubham Tayal, Laxman Raju Thoutam · ECS Journal of Solid State Science and Technology · 2022 · 20 citations

Engineering, Vertically Stacked Jl-nsfet, L G +16