G. Fuse

Narrow-width effects of shallow trench-isolated CMOS with n/sup +/-polysilicon gate

K. Ohe, S. Odanaka, K. Moriyama et al. · IEEE Transactions on Electron Devices · 1989 · 56 citations

Semiconductor Technology, Electrical Engineering, Engineering +11

A practical trench isolation technology with a novel planarization process

G. Fuse, Hiroshi Ogawa, K. Tateiwa et al. · 1987 · 37 citations

Engineering, Zonal Isolation, Integrated Circuits +16

A new isolation method with boron-implanted sidewalls for controlling narrow-width effect

G. Fuse, Motoyuki Fukumoto, Akihiro Shinohara et al. · IEEE Transactions on Electron Devices · 1987 · 35 citations

Semiconductor Technology, Electrical Engineering, Engineering +9

A 16-Mbit DRAM with a relaxed sense-amplifier-pitch open-bit-line architecture

Masasi Inoue, T. Yamada, H. Kotani et al. · IEEE Journal of Solid-State Circuits · 1988 · 32 citations

Electrical Engineering, Memory Architecture, Engineering +13

Depth Profiles of Boron Atoms with Large Tilt‐Angle Implantations

G. Fuse, H. Umimoto, S. Odanaka et al. · Journal of The Electrochemical Society · 1986 · 27 citations

Materials Science, Ion Implantation, Boron Nitride +12