V. Veeramachaneni

Selective node engineering for chip-level soft error rate improvement [in CMOS]

Tanay Karnik, Sriram Vangal, V. Veeramachaneni et al. · 2003 · 65 citations

Engineering, Computer Engineering, Electrical Engineering +17

A TCP offload accelerator for 10 Gb/s ethernet in 90-nm CMOS

Yatin Hoskote, B. Bloechel, G. Dermer et al. · IEEE Journal of Solid-State Circuits · 2003 · 45 citations

Engineering, Computer Engineering, Computer Science +17

5-GHz 32-bit integer execution core in 130-nm dual-V/sub T/ CMOS

Sriram Vangal, Mark Anders, Nitin Borkar et al. · IEEE Journal of Solid-State Circuits · 2002 · 35 citations

Engineering, Computer Engineering, Electrical Engineering +14

A 5 GHz floating point multiply-accumulator in 90 nm dual V/sub T/ CMOS

Sriram Vangal, Yatin Hoskote, Dinesh Somasekhar et al. · 2003 · 19 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 10GHz TCP offload accelerator for 10Gb/s Ethernet in 90nm dual-V/sub T/ CMOS

Yatin Hoskote, Vasantha Erraguntla, D. Finan et al. · 2003 · 14 citations

Engineering, Computer Engineering, Electrical Engineering +17