Moty Mehalel

Erratic fluctuations of sram cache vmin at the 90nm process technology node

M. Agostinelli, J. Hicks, Jianzhong Xu et al. · 2006 · 116 citations

Hardware Security, Non-volatile Memory, Electrical Engineering +15

A fully integrated multi-CPU, GPU and memory controller 32nm processor

Marcelo Yuffe, Ernest Knoll, Moty Mehalel et al. · 2011 · 112 citations · Full text

The Implementation of the 65nm Dual-Core 64b Merom Processor

Nabeel Sakran, Marcelo Yuffe, Moty Mehalel et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2007 · 59 citations

Coretrade Architecture, Electrical Engineering, Manycore Processor +13

An Energy Efficient 32-nm 20-MB Shared On-Die L3 Cache for Intel® Xeon® Processor E5 Family

Min Huang, Moty Mehalel, Ramesh Arvapalli et al. · IEEE Journal of Solid-State Circuits · 2013 · 31 citations

System On Chip, Electrical Engineering, Manycore Processor +13

A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor

Marcelo Yuffe, Moty Mehalel, Ernest Knoll et al. · IEEE Journal of Solid-State Circuits · 2011 · 24 citations

Engineering, Vlsi Design, Clock Generation +16