Vivek Chickermane

Statistics

Publications

Citations

880

H-Index

Active since

1993

Affiliations

Cadence Design Systems (United States)(Current)

University of Illinois Urbana-Champaign

Cadence Design Systems (India)

IMEC

Taiwan Semiconductor Manufacturing Company (United States)

Vivek Chickermane is an author at Cadence Design Systems (United States) specializing in engineering, design for testability, and computer engineering.

ORCID

Publications per year

1993–2023

Publications

An optimization based approach to the partial scan design problem

Vivek Chickermane, J.H. Patel · 2002 · 150 citations

Engineering, Computer Engineering, Computer Science +17

Channel masking synthesis for efficient on-chip test compression

Vivek Chickermane, B. E. Foutz, Brion Keller · 2005 · 121 citations

Engineering, Computer Engineering, Electrical Engineering +15

A fault oriented partial scan design approach

Vivek Chickermane, J.H. Patel · 2002 · 119 citations

Engineering, Computer Engineering, Electrical Engineering +14

Non-scan design-for-testability techniques for sequential circuits

Vivek Chickermane, E.M. Rudnick, Prithviraj Banerjee et al. · 1993 · 52 citations

Engineering, Computer Engineering, Electrical Engineering +11

DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks

Sergej Deutsch, Brion Keller, Vivek Chickermane et al. · 2012 · 38 citations

Engineering, Computer Engineering, Computer Science +17

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