S. Kajiwara

A high-density low on-resistance trench lateral power MOSFET with a trench bottom source contact

Naoto Fujishima, A. Sugi, S. Kajiwara et al. · IEEE Transactions on Electron Devices · 2002 · 55 citations

Low-power Electronics, Trench Sidewalls, Electrical Engineering +8

A high density, low on-resistance 700V class trench offset drain LDMOSFET (TOD-LDMOS)

Hideto Teranishi, Akio Kitamura, Yoshio Watanabe et al. · 2004 · 21 citations

High Density, Electrical Engineering, Engineering +6

A New Isolation Technique for Reverse Blocking IGBT with Ion Implantation and Laser Annealing to Tapered Chip Edge Sidewalls

K. Shimoyama, Masahiro Takei, Yusuke Souma et al. · 2006 · 16 citations

Electrical Engineering, P+ Isolation Layer, Engineering +11

Design and measurements of test element group wafer thinned to 10 μm for 3D system in package

Akihiro Ikeda, T. Kuwata, S. Kajiwara et al. · 2004 · 11 citations

Engineering, Reverse Saturation, N-well P-si Diodes +17