Kosuke Hatsuda

A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes

H. Shiga, D. Takashima, S. Shiratake et al. · IEEE Journal of Solid-State Circuits · 2010 · 75 citations

Electrical Engineering, Conventional Laser Fuse, Vlsi Design +13

Floating Body RAM Technology and its Scalability to 32nm Node and Beyond

T. Shino, N. Kusunoki, Tomoki Higashi et al. · 2006 · 33 citations

Hardware Security, Electrical Engineering, Engineering +13

A Floating-Body Cell Fully Compatible With 90-nm CMOS Technology Node for a 128-Mb SOI DRAM and Its Scalability

Takeshi Hamamoto, Y. Minami, T. Shino et al. · IEEE Transactions on Electron Devices · 2007 · 27 citations

Hardware Security, Low-power Electronics, Electrical Engineering +13

Design of a 128-Mb SOI DRAM Using the Floating Body Cell (FBC)

Takashi Ohsawa, K. Fujita, Kosuke Hatsuda et al. · IEEE Journal of Solid-State Circuits · 2005 · 20 citations

Hardware Security, Non-volatile Memory, Electrical Engineering +14

An 18.5ns 128Mb SOI DRAM with a floating body cell

Takashi Ohsawa, K. Fujita, Kosuke Hatsuda et al. · 2005 · 19 citations

Non-volatile Memory, Memory Architecture, Sense Margin +12