Rishu Chaujar

Interfacial Charge Analysis of Heterogeneous Gate Dielectric-Gate All Around-Tunnel FET for Improved Device Reliability

Jaya Madan, Rishu Chaujar · IEEE Transactions on Device and Materials Reliability · 2016 · 227 citations

Device Modeling, Electrical Engineering, Semiconductor Device +14

Numerical Simulation of N⁺ Source Pocket PIN-GAA-Tunnel FET: Impact of Interface Trap Charges and Temperature

Jaya Madan, Rishu Chaujar · IEEE Transactions on Electron Devices · 2017 · 106 citations

Device Modeling, Semiconductor Technology, Electrical Engineering +15

Device linearity and intermodulation distortion comparison of dual material gate and conventional AlGaN/GaN high electron mobility transistor

Sona P. Kumar, Anju Agrawal, Rishu Chaujar et al. · Microelectronics Reliability · 2010 · 100 citations

Intermodulation Distortion Comparison, Electrical Engineering, Engineering +5

Gate Drain Underlapped-PNIN-GAA-TFET for Comprehensively Upgraded Analog/RF Performance

Jaya Madan, Rishu Chaujar · Superlattices and Microstructures · 2016 · 75 citations

Electrical Engineering, Engineering, Rf Semiconductor +5

Numerical simulations: Toward the design of 27.6% efficient four-terminal semi-transparent perovskite/SiC passivated rear contact silicon tandem solar cell

Rahul Pandey, Rishu Chaujar · Superlattices and Microstructures · 2016 · 70 citations

Materials Science, Electrical Engineering, Engineering +9