Concepedia

Rishu Chaujar

RC

80

Publications

2.8K

Citations

34

H-Index

2007

Active since

Affiliations

Delhi Technological University(Current)

Jaypee Institute of Information Technology

University of Delhi

Chitkara University

Deen Dayal Upadhyay Hospital

Rishu Chaujar is an author at Delhi Technological University specializing in electrical engineering, engineering, and microelectronics.

ORCID

Top concepts

Publications per year

2007–2022

80

Publications

80

Interfacial Charge Analysis of Heterogeneous Gate Dielectric-Gate All Around-Tunnel FET for Improved Device Reliability

Jaya Madan, Rishu Chaujar · IEEE Transactions on Device and Materials Reliability · 2016 · 227 citations

, , +14

Numerical Simulation of N<sup>+</sup> Source Pocket PIN-GAA-Tunnel FET: Impact of Interface Trap Charges and Temperature

Jaya Madan, Rishu Chaujar · IEEE Transactions on Electron Devices · 2017 · 106 citations

, , +15

Device linearity and intermodulation distortion comparison of dual material gate and conventional AlGaN/GaN high electron mobility transistor

Sona P. Kumar, Anju Agrawal, Rishu Chaujar et al. · Microelectronics Reliability · 2010 · 100 citations

, , +5

Gate Drain Underlapped-PNIN-GAA-TFET for Comprehensively Upgraded Analog/RF Performance

Jaya Madan, Rishu Chaujar · Superlattices and Microstructures · 2016 · 75 citations

, , +5

Numerical simulations: Toward the design of 27.6% efficient four-terminal semi-transparent perovskite/SiC passivated rear contact silicon tandem solar cell

Rahul Pandey, Rishu Chaujar · Superlattices and Microstructures · 2016 · 70 citations

, , +9

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