Jianwei Peng

Hybrid low‐ <i>k</i> spacer scheme for advanced FinFET technology parasitic capacitance reduction

Man Gu, X. Wang, W. Li et al. · Electronics Letters · 2020 · 18 citations

Low-power Electronics, Device Modeling, Electrical Engineering +14

Source/drain eSiGe engineering for FinFET technology

Jianwei Peng, Yi Qi, Hsien-Ching Lo et al. · Semiconductor Science and Technology · 2017 · 17 citations

Materials Science, Electrical Engineering, Epitaxial Growth +12

A 12nm FinFET Technology Featuring 2nd Generation FinFET for Low Power and High Performance Applications

Hsien-Ching Lo, Dae Hee Choi, Yue Hu et al. · 2018 · 16 citations

Low-power Electronics, Low Power, Electrical Engineering +10

In-Situ Boron Doped SiGe Epitaxy Optimization for FinFET Source/Drain

Yi Qi, Jianwei Peng, Hsien-Ching Lo et al. · ECS Transactions · 2016 · 14 citations

Materials Engineering, Electrical Engineering, Engineering +10

Abnormal Silicon-Germanium (SiGe) Epitaxial Growth in FinFETs

Talapady Srivatsa Bhat, Shashidhar Shintri, Brad Chen et al. · IEEE Transactions on Semiconductor Manufacturing · 2020 · 11 citations