Ik Kyeong Jin

A 14nm logic technology featuring 2<sup>nd</sup>-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm<sup>2</sup> SRAM cell size

S. Natarajan, M. Agostinelli, Sheikh A. Akbar et al. · 2014 · 532 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 10nm high performance and low-power CMOS technology featuring 3^rd generation FinFET transistors, Self-Aligned Quad Patterning, contact over active gate and cobalt local interconnects

C. Auth, A. Aliyarukunju, M. Asoro et al. · 2017 · 369 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 32nm logic technology featuring 2<sup>nd</sup>-generation high-k + metal-gate transistors, enhanced channel strain and 0.171μm<sup>2</sup> SRAM cell size in a 291Mb array

S. Natarajan, M Armstrong, M. Bost et al. · 2008 · 184 citations

Engineering, Computer Engineering, Electrical Engineering +16

Direct-laser-patterned friction layer for the output enhancement of a triboelectric nanogenerator

Daewon Kim, Il‐Woong Tcho, Ik Kyeong Jin et al. · Nano Energy · 2017 · 126 citations

Engineering, Materials Engineering, Materials Science +16

Disk-based triboelectric nanogenerator operated by rotational force converted from linear force by a gear system

Il‐Woong Tcho, Seung‐Bae Jeon, Sang-Jae Park et al. · Nano Energy · 2018 · 77 citations

Engineering, Materials Science, Mechanical Engineering +16