Saman Adham

A 5-nm 254-TOPS/W 221-TOPS/mm² Fully-Digital Computing-in-Memory Macro Supporting Wide-Range Dynamic-Voltage-Frequency Scaling and Simultaneous MAC and Write Operations

Hidehiro Fujiwara, H. Mori, Wei-Chang Zhao et al. · 2022 IEEE International Solid- State Circuits Conference (ISSCC) · 2022 · 183 citations

Engineering, Vlsi Design, Emerging Memory Technology +18

Scan-based BIST fault diagnosis

Yuejian Wu, Saman Adham · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1999 · 61 citations

Engineering, Measurement, Mem Testing +19

34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm² and 3.78Mb/mm² Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell

Hidehiro Fujiwara, H. Mori, Wei-Chang Zhao et al. · 2024 · 44 citations

Engineering, Vlsi Design, Computer Architecture +21

BIST fault diagnosis in scan-based VLSI environments

Yuejian Wu, Saman Adham · 2002 · 41 citations

Engineering, Mem Testing, Verification +18

Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study

Sandeep Goel, Saman Adham, Min-Jer Wang et al. · 2013 · 34 citations

Engineering, Vlsi Design, Dft Architecture +20