K.P. Lisiak

Modeling snapback of LVTSCR devices for ESD circuit simulation using advanced BJT and MOS models

Yuanzhong Zhou, Jean-Jacques Hajjar, Alan Righter et al. · 2007 · 41 citations

Engineering, Computer Engineering, Electrical Engineering +17

A high-performance planar power MOSFET

R.W. Coen, D. W. Tsang, K.P. Lisiak · IEEE Transactions on Electron Devices · 1980 · 39 citations

Engineering, Electrical Engineering, Design Optimization +13

Optimization of nonplanar power MOS transistors

K.P. Lisiak, Johannes Berger · IEEE Transactions on Electron Devices · 1978 · 26 citations

Engineering, Electrical Engineering, Microelectronics +16

ESD Simulation using Compact Models: from I/O Cell to Full Chip

Yuanzhong Zhou, Thorsten Weyl, Jean-Jacques Hajjar et al. · 2007 · 14 citations

Engineering, Computer Engineering, Electrical Engineering +17

Compact Modeling of On-Chip ESD Protection Using Standard MOS and BJT Models

Yuanzhong Zhou, Jean-Jacques Hajjar, K.P. Lisiak · 2006 · 10 citations

Engineering, Electrical Engineering, Circuit Theory +16