Riko Radojcic

Electrical Characterization for Intertier Connections and Timing Analysis for 3-D ICs

Xiaoxia Wu, Wei Zhao, Mark Nakamoto et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2010 · 42 citations

Engineering, Vlsi Design, Computer Architecture +16

Multi-die chip on wafer thermo-compression bonding using non-conductive film

David Hiner, Dong Wook Kim, Seokgeun Ahn et al. · 2015 · 32 citations

Materials Science, Materials Engineering, Electrical Engineering +15

Development of 3D through silicon stack (TSS) assembly for wide IO memory to logic devices integration

Dong Wook Kim, V. Ramachandran, B. Henderson et al. · 2013 · 29 citations

Engineering, Device Integration, Computer Architecture +16

Some aspects of hot-electron aging in MOSFET's

Riko Radojcic · IEEE Transactions on Electron Devices · 1984 · 17 citations

Electrical Engineering, Engineering, Physics +10

Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study

Dragomir Milojevic, Trevor E. Carlson, K. Croes et al. · 2009 · 16 citations

New Technologies, Engineering, Accelerated Design +24