Chi Fung Poon

A fully adaptive 19-to-56Gb/s PAM-4 wireline transceiver with a configurable ADC in 16nm FinFET

Parag Upadhyaya, Chi Fung Poon, Siok Wei Lim et al. · 2018 · 90 citations

Low-power Electronics, Hardware Security, Electrical Engineering +11

A Fully Adaptive 19–58-Gb/s PAM-4 and 9.5–29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFET

Parag Upadhyaya, Chi Fung Poon, Siok Wei Lim et al. · IEEE Journal of Solid-State Circuits · 2018 · 43 citations

Adaptive Receiver, Electrical Engineering, Nrz Wireline Transceiver +11

A 112GB/S PAM4 Wireline Receiver Using a 64-Way Time-Interleaved SAR ADC in 16NM FinFET

James Hudner, Declan Carey, Ronan Casey et al. · 2018 · 35 citations

Continuous-time Linear Equalizers, Capacitance Buffer, Data Converter +6

A wide common-mode fully-adaptive multi-standard 12.5Gb/s backplane transceiver in 28nm CMOS

Jafar Savoj, Kenny Hsieh, Parag Upadhyaya et al. · 2012 · 29 citations

5-Tap Speculative Dfe, Engineering, Vlsi Design +9

A 1.24-pJ/b 112-Gb/s (870 Gb/s/Mm) Transceiver for In-Package Links in 7-nm FinFET

Chi Fung Poon, Wenfeng Zhang, Junho Cho et al. · IEEE Journal of Solid-State Circuits · 2022 · 22 citations

Electrical Engineering, 7-Nm Finfet, Dcc Clock Calibration +14