Haruyoshi Yonekawa

BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W

Kota Ando, Kodai Ueyoshi, Kentaro Orimo et al. · IEEE Journal of Solid-State Circuits · 2017 · 154 citations

Electrical Engineering, Binary/ternaty Neural Network, Engineering +15

A Lightweight YOLOv2

Hiroki Nakahara, Haruyoshi Yonekawa, Tomoya Fujii et al. · 2018 · 133 citations

Convolutional Neural Network, Engineering, Machine Learning +16

On-Chip Memory Based Binarized Convolutional Deep Neural Network Applying Batch Normalization Free Technique on an FPGA

Haruyoshi Yonekawa, Hiroki Nakahara · 2017 · 85 citations

Hardware Security, Convolutional Neural Network, Batch Normalization Techniques +13

BRein memory: A 13-layer 4.2 K neuron/0.8 M synapse binary/ternary reconfigurable in-memory deep neural network accelerator in 65 nm CMOS

Kota Ando, Kodai Ueyoshi, Kentaro Orimo et al. · 2017 · 82 citations

Engineering, Neural Networks (Machine Learning), Nm Cmos +20

An object detector based on multiscale sliding window search using a fully pipelined binarized CNN on an FPGA

Hiroki Nakahara, Haruyoshi Yonekawa, Shimpei Sato · 2017 · 24 citations

Convolutional Neural Network, Engineering, Feature Detection +17