Hiroki Nakahara - Concepedia

Author

Hiroki Nakahara

Tokyo Institute of Technology ORCID

Also Known As

H. NAKAHARA, H. Nakahara, Hiroki NAKAHARA, Hiroki Nakahara, Hiromi NAKAHARA

185

Publications

1.4K

Citations

H-Index

Concepts

All Affiliations

Tokyo Institute of Technology National Institute of Information and Communications Technology Meiji University Hokkaido University Imperial College London

About

Hiroki Nakahara is an author at Tokyo Institute of Technology specializing in computer science, computer engineering, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	18	25	1K
2	Computer Engineering	18	25	1K
3	Computer Science	18	25	1K
4	Data Science	4	4	93
5	Social Sciences	1	1	82

Hiroki Nakahara

Publications

Citations

H-Index

Page 1

	Year	Citations
BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W Kota Ando, Kodai Ueyoshi, Kentaro Orimo, IEEE Journal of Solid-State Circuits Electrical EngineeringBinary/ternaty Neural NetworkEngineeringHardware AccelerationEnergy Efficiency	2017	154
A Lightweight YOLOv2 Hiroki Nakahara, Haruyoshi Yonekawa, Tomoya Fujii, Convolutional Neural NetworkEngineeringMachine LearningRegression ProblemLightweight Yolov2	2018	133
On-Chip Memory Based Binarized Convolutional Deep Neural Network Applying Batch Normalization Free Technique on an FPGA Haruyoshi Yonekawa, Hiroki Nakahara Hardware SecurityConvolutional Neural NetworkBatch Normalization TechniquesEngineeringMachine Learning	2017	85
BRein memory: A 13-layer 4.2 K neuron/0.8 M synapse binary/ternary reconfigurable in-memory deep neural network accelerator in 65 nm CMOS Kota Ando, Kodai Ueyoshi, Kentaro Orimo, EngineeringNeural Networks (Machine Learning)Nm CmosComputer ArchitectureNeurochip	2017	82
A deep convolutional neural network based on nested residue number system Hiroki Nakahara, Tsutomu Sasao Convolutional Neural NetworkEngineeringMachine LearningHardware AlgorithmComputer Architecture	2015	71
A fully connected layer elimination for a binarizec convolutional neural network on an FPGA Hiroki Nakahara, Tomoya Fujii, Shimpei Sato Convolutional Neural NetworkEngineeringMachine LearningHardware AlgorithmComputer Architecture	2017	71
A Random Forest Using a Multi-valued Decision Diagram on an FPGA Hiroki Nakahara, Akira Jinguji, Simpei Sato, Artificial IntelligenceEngineeringMachine LearningData ScienceData Mining	2017	37
High-Throughput Convolutional Neural Network on an FPGA by Customized JPEG Compression Hiroki Nakahara, Zhiqiang Que, Wayne Luk Convolutional Neural NetworkEngineeringHardware AlgorithmComputer ArchitectureImage Analysis	2020	35
A High-speed Low-power Deep Neural Network on an FPGA based on the Nested RNS: Applied to an Object Detector Hiroki Nakahara, Tsutomu Sasao Convolutional Neural NetworkEngineeringMachine LearningObject DetectorImage Analysis	2018	33
New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications Tarô Fujii, Takao Toi, Teruhito Tanaka, Artificial IntelligenceEngineeringComputer ArchitectureIntelligent SystemsEmbedded Systems	2018	30

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