Pierre‐Emmanuel Gaillardon

Author

École Polytechnique Fédérale de Lausanne ORCID

Also Known As

Gaillardon P. -E., Gaillardon, Pierre-Emmanuel, P. Gaillardon, Pierre-Emanuel Gaillardon, Pierre-Emmanuel GAILLARDON, Pierre-Emmanuel Gaillardon, Pierre‐Emmanuel Gaillardon, Valerio Tenace

278

Publications

5.2K

Citations

H-Index

180

Concepts

All Affiliations

École Polytechnique Fédérale de Lausanne University of Utah Synopsys (United States)CEA Grenoble Commissariat à l'Énergie Atomique et aux Énergies Alternatives

About

Pierre‐Emmanuel Gaillardon is an author at École Polytechnique Fédérale de Lausanne specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	37	99	3.7K
2	Education	3	3	142
3	Business	1	1	41
4	Management	1	1	30
5	Public Health	1	1	65

Pierre‐Emmanuel Gaillardon

118

Publications

4.7K

Citations

H-Index

Page 1

	Year	Citations
The EPFL Combinational Benchmark Suite Luca Amarù, Pierre‐Emmanuel Gaillardon Figshare	2019	290
Majority-Inverter Graph: A New Paradigm for Logic Optimization Luca Amarù, Pierre‐Emmanuel Gaillardon, Giovanni De Micheli IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Circuit ComplexityEngineeringBoolean FunctionElectronic Design AutomationComputer Architecture	2015	212
Majority-Inverter Graph Luca Amarù, Pierre‐Emmanuel Gaillardon, Giovanni De Micheli Circuit ComplexityLogic SynthesisLogic OptimizationEngineeringBoolean Function	2014	165
Doping-Free Complementary Logic Gates Enabled by Two-Dimensional Polarity-Controllable Transistors Giovanni V. Resta, Yashwanth Balaji, Dennis Lin, ACS Nano	2018	149
Configurable Logic Gates Using Polarity-Controlled Silicon Nanowire Gate-All-Around FETs Michele De Marchi, Jian Zhang, Stefano Frache, IEEE Electron Device Letters	2014	113
Top–Down Fabrication of Gate-All-Around Vertically Stacked Silicon Nanowire FETs With Controllable Polarity Michele De Marchi, Davide Sacchetto, Jian Zhang, IEEE Transactions on Nanotechnology EngineeringNanodevicesControllable PolarityIntegrated CircuitsSemiconductor Device	2014	112
SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks Surya Narayanan, Karl Taht, Rajeev Balasubramonian, EngineeringComputer ArchitectureNeurochipSocial SciencesData Science	2020	107
The Programmable Logic-in-Memory (PLiM) computer Pierre‐Emmanuel Gaillardon, Luca Amarù, Anne Siemon, RWTH Publications (RWTH Aachen) Non-volatile MemoryEngineeringComputer ArchitectureBoolean Arithmetic CircuitsHardware Security	2016	94
Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs Jian Zhang, Xifan Tang, Pierre‐Emmanuel Gaillardon, IEEE Transactions on Circuits and Systems I Regular Papers Low-power ElectronicsElectrical EngineeringSemiconductor DeviceEngineeringVlsi Design	2014	90
Polarity-Controllable Silicon Nanowire Transistors With Dual Threshold Voltages Jian Zhang, Michele De Marchi, Davide Sacchetto, IEEE Transactions on Electron Devices Device ModelingElectrical EngineeringElectronic DevicesSilicon NanowiresSilicon Nanowire Transistor	2014	87

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