Configurable Logic Gates Using Polarity-Controlled Silicon Nanowire Gate-All-Around FETs

Abstract

This letter demonstrates the first fabricated four-transistor logic gates using polarity-configurable, gate-all-around silicon nanowire transistors. This technology enhances conventional CMOS functionality by adding the degree of freedom of dynamic polarity control n- or p-type. In addition, devices are fabricated with low, uniform doping profiles, reducing constraints at scaled technology nodes. We demonstrate through measurements and simulations how this technology can be applied to fabricate logic gates with fewer resources than CMOS. In particular, full-swing output XOR and NAND logic gates are demonstrated using the same physical four-transistor circuit.